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In November 2023, Semicorex released 850V GaN-on-Si epitaxial products for high-voltage, high-current HEMT power device applications. Compared to other substrates for HMET power devices, GaN-on-Si enables larger wafer sizes and more diversified applications, and it can also be quickly introduced into the mainstream silicon chip process in fabs, which is a unique advantage for improving the yield of power devices.

The process of monocrystalline silicon growth predominantly occurs within a thermal field, where the quality of the thermal environment significantly impacts crystal quality and growth efficiency. The design of the thermal field plays a pivotal role in shaping temperature gradients and gas flow dynamics within the furnace chamber. Furthermore, the materials used in constructing the thermal field directly influence its lifespan and performance.

The processing of 4H-SiC substrate mainly includes the following steps:

Currently, many semiconductor devices employ mesa device structures, which are predominantly created through two types of etching: wet etching and dry etching. While the simple and rapid wet etching plays a significant role in semiconductor device fabrication, it has inherent drawbacks such as isotropic etching and poor uniformity, which result in limited control when transferring small-sized patterns. Dry etching, however, with its high anisotropy, good uniformity, and repeatability, has become prominent in semiconductor device fabrication processes. The term “dry etching” broadly refers to any non-wet etching technology used for removing surface materials and transferring micro and nano patterns, including laser etching, plasma etching, and chemical vapor etching. The dry etching discussed in this text specifically pertains to the narrow application of processes using plasma discharge—either physical or chemical—to modify material surfaces.

Defect-free epitaxial growth occurs when one crystal lattice has nearly identical lattice constants to another. Growth happens when lattice sites of the two lattices at the interface region are approximately matched, which is possible with a small lattice mismatch (less than 0.1%). This approximate matching is achieved even with elastic strain at the interface, where each atom is slightly displaced from its original position in the boundary layer. While a small amount of strain is tolerable for thin layers and even desirable for quantum well lasers, the strain energy stored in the crystal is generally lowered by the formation of misfit dislocations, which involve a missing row of atoms in one lattice.

Plasma Enhanced Chemical Vapor Deposition (PECVD) is a widely used technology in chip manufacturing. It utilizes the kinetic energy of electrons within plasma to activate chemical reactions in the gas phase, thereby achieving thin-film deposition.