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Epitaxial wafers have been used in the electronics industry for decades, but their importance has only increased as technology has advanced. In this article, we will explore what epitaxial wafers are and why they are such an essential component of modern electronics.

The development of 3C-SiC, a significant polytype of silicon carbide, reflects the continuous advancement of semiconductor material science. In the 1980s, Nishino et al. first achieved a 4 μm thick 3C-SiC film on a silicon substrate using chemical vapor deposition (CVD)[1], laying the foundation for 3C-SiC thin-film technology.

Gallium Nitride (GaN) epitaxial wafer growth is a complex process, often utilizing a two-step method. This method involves several critical stages, including high-temperature baking, buffer layer growth, recrystallization, and annealing. By meticulously controlling the temperature throughout these stages, the two-step growth method effectively prevents wafer warping caused by lattice mismatch or stress, making it the predominant fabrication method for GaN epitaxial wafers globally.

Silicon carbide (SiC) is currently facing challenges in the "price war," while gallium nitride (GaN) is emerging as a key player in the next technological battlefield.

In the realm of semiconductor device fabrication, the precise control of crystal growth is paramount for achieving high-quality and reliable devices. One technique that has played a pivotal role in this domain is Liquid-Phase Epitaxy (LPE).

Defect-free epitaxial growth occurs when one crystal lattice has nearly identical lattice constants to another. Growth happens when lattice sites of the two lattices at the interface region are approximately matched, which is possible with a small lattice mismatch (less than 0.1%). This approximate matching is achieved even with elastic strain at the interface, where each atom is slightly displaced from its original position in the boundary layer. While a small amount of strain is tolerable for thin layers and even desirable for quantum well lasers, the strain energy stored in the crystal is generally lowered by the formation of misfit dislocations, which involve a missing row of atoms in one lattice.