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According to the research results, TaC coating can act as a protection and isolation layer to extend graphite component life, improve radial temperature uniformity, maintain SiC sublimation stoichiometry, suppress impurity migration, and reduce energy consumption. Ultimately a TaC-coated graphite crucible set is expected to improve SiC PVT process control and product quality.

Recently, the semiconductor industry has continued to pay increasing attention to Gallium Nitride (GaN) technology. Due to its excellent electronic properties, Gallium Nitride devices have important applications in many high-tech fields:

Currently, many semiconductor devices employ mesa device structures, which are predominantly created through two types of etching: wet etching and dry etching. While the simple and rapid wet etching plays a significant role in semiconductor device fabrication, it has inherent drawbacks such as isotropic etching and poor uniformity, which result in limited control when transferring small-sized patterns. Dry etching, however, with its high anisotropy, good uniformity, and repeatability, has become prominent in semiconductor device fabrication processes. The term “dry etching” broadly refers to any non-wet etching technology used for removing surface materials and transferring micro and nano patterns, including laser etching, plasma etching, and chemical vapor etching. The dry etching discussed in this text specifically pertains to the narrow application of processes using plasma discharge—either physical or chemical—to modify material surfaces.

Defect-free epitaxial growth occurs when one crystal lattice has nearly identical lattice constants to another. Growth happens when lattice sites of the two lattices at the interface region are approximately matched, which is possible with a small lattice mismatch (less than 0.1%). This approximate matching is achieved even with elastic strain at the interface, where each atom is slightly displaced from its original position in the boundary layer. While a small amount of strain is tolerable for thin layers and even desirable for quantum well lasers, the strain energy stored in the crystal is generally lowered by the formation of misfit dislocations, which involve a missing row of atoms in one lattice.

The first generation of semiconductor materials is mainly represented by silicon (Si) and germanium (Ge), which began to rise in the 1950s. Germanium was dominant in the early days and was mainly used in low-voltage, low-frequency, medium-power transistors and photodetectors, but due to its poor high temperature resistance and radiation resistance, it was gradually replaced by silicon devices in the late 1960s. Silicon is still the main semiconductor material in the field of microelectronics due to its high technological maturity and cost advantages.

Within the silicon carbide (SiC) industry chain, substrate suppliers hold significant leverage, primarily due to value distribution. SiC substrates account for 47% of the total value, followed by epitaxial layers at 23%, while device design and manufacturing constitute the remaining 30%. This inverted value chain stems from the high technological barriers inherent to substrate and epitaxial layer production. Three major challenges plague SiC substrate growth: stringent growth conditions, slow growth rates, and demanding crystallographic requirements. These complexities contribute to increased processing difficulty, ultimately resulting in low product yields and high costs. Furthermore, the epitaxial layer’s thickness and doping concentration are critical parameters directly impacting the final device performance.