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A P-type silicon carbide (SiC) wafer is a semiconductor substrate that is doped with impurities to create a P-type (positive) conductivity. Silicon carbide is a wide-bandgap semiconductor material that offers exceptional electrical and thermal properties, making it suitable for high-power and high-temperature electronic devices.

C/C composite is a carbon-carbon composite material made of carbon fibers as reinforcement and carbon as matrix through processing and carbonization, with excellent mechanical and high-temperature resistance properties. The material was initially used in aerospace and special fields, and with the maturity of the technology, it has been gradually used in photovoltaic, automotive, lithium battery, medical devices and other fields.

The Silicon Carbide (SiC) production process encompasses the preparation of substrate and epitaxy from the materials side, followed by chip design and manufacturing, device packaging, and finally, distribution to downstream application markets. Among these stages, substrate material processing is the most challenging aspect of the SiC industry. SiC substrates are both hard and brittle, making cutting, grinding, and polishing extremely difficult. This increases the likelihood of defects during processing and reduces the yield rate. Currently, major international SiC manufacturers are planning to transition from 6-inch to 8-inch SiC wafers. Overcoming the challenges associated with 8-inch substrates has become a critical benchmark for the SiC industry. This article will introduce the key parameters of SiC substrates.

The processing of 4H-SiC substrate mainly includes the following steps:

Single crystal silicon and polycrystalline silicon each have their own unique advantages and applicable scenarios. Single crystal silicon is suitable for high-performance electronic products and microelectronics due to its excellent electrical and mechanical properties. Polycrystalline silicon, on the other hand, dominates the field of solar cells due to its low cost and good photoelectric conversion efficiency.

Wafer cleaning refers to the process of removing particulate contaminants, organic contaminants, metal contaminants, and natural oxide layers from the wafer surface using physical or chemical methods before semiconductor processes such as oxidation, photolithography, epitaxy, diffusion, and wire evaporation. In the semiconductor manufacturing, the yield rate of semiconductor devices largely depends on the cleanliness of the semiconductor wafer surface. Therefore, to achieve the cleanliness required for semiconductor manufacturing, the rigorous wafer cleaning processes are essential.