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The Silicon Carbide (SiC) production process encompasses the preparation of substrate and epitaxy from the materials side, followed by chip design and manufacturing, device packaging, and finally, distribution to downstream application markets. Among these stages, substrate material processing is the most challenging aspect of the SiC industry. SiC substrates are both hard and brittle, making cutting, grinding, and polishing extremely difficult. This increases the likelihood of defects during processing and reduces the yield rate. Currently, major international SiC manufacturers are planning to transition from 6-inch to 8-inch SiC wafers. Overcoming the challenges associated with 8-inch substrates has become a critical benchmark for the SiC industry. This article will introduce the key parameters of SiC substrates.

Wide bandgap (WBG) semiconductors such as Silicon Carbide (SiC) and Gallium Nitride (GaN) are expected to play an increasingly important role in power electronic devices. They offer several advantages over traditional Silicon (Si) devices, including higher efficiency, power density, and switching frequency. Ion implantation is the primary method for achieving selective doping in Si devices. However, there are some challenges when applying it to wide bandgap devices. In this article, we will focus on some of these challenges and summarize their potential applications in GaN power devices.

A Dummy Wafer is a specialized wafer utilized primarily to fill machine equipment during the wafer manufacturing process.

In the process of growing SiC and AlN single crystals by the physical vapor transport method (PVT), components such as the crucible, seed crystal holder and guide ring play a vital role. During the preparation process of SiC, the seed crystal is located in a relatively low temperature region, while the raw material is in a high temperature region exceeding 2400°C. The raw materials decompose at high temperatures to form SiXCy (including Si, SiC₂, Si₂C and other components).

To achieve the high-quality requirements of IC chip circuit processes with line widths smaller than 0.13μm to 28nm for 300mm diameter silicon polishing wafers, it is essential to minimize contamination from impurities, such as metal ions, on the wafer's surface.

Heat treatment is one of the essential and important processes in the semiconductor process. Thermal process is the process of applying thermal energy to a wafer by placing it in an environment filled with a specific gas, including oxidation/diffusion/annealing, etc.