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SiC substrate can have microscopic defects, such as Threading Screw Dislocation (TSD), Threading Edge Dislocation (TED), Base Plane Dislocation (BPD), and others. These defects are caused by deviations in the arrangement of atoms at the atomic level.

Semicorex's SiC crystal growth furnace component, the porous graphite barrel, will bring three major benefits and can effectively strengthen the competitiveness of domestic SiC substrates:

In semiconductor manufacturing, atomic-level flatness is usually used to describe the global flatness of the wafer, with the unit of nanometers (nm).

Defect-free epitaxial growth occurs when one crystal lattice has nearly identical lattice constants to another. Growth happens when lattice sites of the two lattices at the interface region are approximately matched, which is possible with a small lattice mismatch (less than 0.1%). This approximate matching is achieved even with elastic strain at the interface, where each atom is slightly displaced from its original position in the boundary layer. While a small amount of strain is tolerable for thin layers and even desirable for quantum well lasers, the strain energy stored in the crystal is generally lowered by the formation of misfit dislocations, which involve a missing row of atoms in one lattice.

Oxidation processes play a critical role in preventing such problems by creating a protective layer on the wafer, known as the oxide layer, which acts as a barrier between different chemicals.